2010 · 12 citations · 6 references
EngineeringMaterials EngineeringMaterials ScienceManufacturing ProcessesMicrofabricationPackaging DesignChip PackagingPackaging EngineeringWafer BondingAdvanced PackagingBumpsFlip-chip BondingFlip-chip PackagingSoldering JointsThree-dimensional Integration
Miniaturized 3D package with shorter distances between chips are needed for the mobile and high frequency applications. Chip-to-chip stacking for 3D packaging using conventional assembly method and single step reflow attachment is the most cost-effective. But fine pitch micro-joints of stacked chip by single re-flow attachment is challenging due to chip movement during stacking processes, which lead to poor assembly yields. This paper reports a method of stacking chips by thermal tacking and permanent joints are formed simultaneously by single re-flow step. Three chips of 12mm × 12mm size with micro bumps at 100um pitch have been assembled using this approach. Low volume of lead free solder (Sn) has been chosen for the micro-bump interconnections between the chips. The thermal tacking conditions and flip-chip assembly process have been studied in details. The micro-joints quality and reliability have been assessed and reported.
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3D Chip Stacking Technology with Low-Volume Lead-Free Interconnections
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