Yoichiro Kurita

A 3D Packaging Technology for 4 Gbit Stacked DRAM with 3 Gbps Data Transfer

M. Kawano, Shiro Uchiyama, Y. Egawa et al. · 2006 · 86 citations

Engineering, Computer Engineering, Electrical Engineering +17

Three-Dimensional Packaging Technology for Stacked DRAM With 3-Gb/s Data Transfer

Masaya Kawano, Nobuaki Takahashi, Yoichiro Kurita et al. · IEEE Transactions on Electron Devices · 2008 · 75 citations

Engineering, Computer Engineering, Electrical Engineering +17

A 3D Stacked Memory Integrated on a Logic Device Using SMAFTI Technology

Yoichiro Kurita, S. Matsui, Nobuaki Takahashi et al. · 2007 · 74 citations

Engineering, Computer Engineering, High-performance Computing +17

System in wafer-level package technology with RDL-first process

Norikazu Motohashi, Takehiro Kimura, Kazuyuki MINEO et al. · 2011 · 58 citations

Engineering, Materials Science, Microfabrication +16

Fan-Out Wafer-Level Packaging with highly flexible design capabilities

Yoichiro Kurita, Takehiro Kimura, K. Shibuya et al. · 2010 · 52 citations

Engineering, Computer Engineering, Electrical Engineering +17