Statistics
Publications
4
Citations
270
H-Index
4
Active since
2004
Affiliations
Y. Egawa is an author at NEC (Japan) specializing in three-dimensional integration, microfabrication, and chip packaging.
Publications per year
2004–2007
4
4
A 3D Packaging Technology for 4 Gbit Stacked DRAM with 3 Gbps Data Transfer
M. Kawano, Shiro Uchiyama, Y. Egawa et al. · 2006 · 86 citations
Engineering, Computer Engineering, Electrical Engineering +17
Process integration of 3D chip stack with vertical interconnection
Kenji Takahashi, Yuichi Taguchi, M. Tomisaka et al. · 2004 · 84 citations
Engineering, Electrical Engineering, Materials Engineering +17
Development of 3D-Packaging Process Technology for Stacked Memory Chips
T. Mitsuhashi, Y. Egawa, Osamu Kato et al. · MRS Proceedings · 2006 · 26 citations
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