Concepedia

Flip-chip Packaging

Flip-Chip Packaging is a chip packaging technique in which a semiconductor die is mounted upside-down onto a substrate, with electrical connections made through conductive bumps on the active side of the chip, distinguishing it from wire-bonding or tape-automated bonding methods by enabling shorter interconnects and higher input/output density.

1.3K

Publications

37.9K

Citations

4.5K

Authors

648

Institutions

Publications per year

2017–2026

126

Parents

Publications

1.3K

A Low-Cost Scalable 32-Element 28-GHz Phased Array Transceiver for 5G Communication Links Based on a <inline-formula> <tex-math notation="LaTeX">$2\times 2$ </tex-math> </inline-formula> Beamformer Flip-Chip Unit Cell

Kerim Kibaroglu, Mustafa Sayginer, Gabriel M. Rebeiz · IEEE Journal of Solid-State Circuits · 2018 · 431 citations

, , +17

Low-Temperature Sintered Nanoscale Silver as a Novel Semiconductor Device-Metallized Substrate Interconnect Material

John G. Bai, Ziyang Zhang, Jesus N. Calata et al. · IEEE Transactions on Components and Packaging Technologies · 2006 · 370 citations

, , +17

Pb-free solders for flip-chip interconnects

D. R. Frear, Jihun Jang, J. K. Lin et al. · JOM · 2001 · 317 citations

, , +14

3D integrated superconducting qubits

npj Quantum Information · 2017 · 248 citations · Full text

, , +17

Thermomigration in Pb–Sn solder joints under joule heating during electric current stressing

Hua Ye, Cemal Basaran, Douglas C. Hopkins · Applied Physics Letters · 2003 · 243 citations

, , +17

1–5 of 1.3K

Authors

4.5K

  1. CW
    C.P. Wong

    Georgia Institute of Technology, United States

    41 publications · 1.2K citations

    18

    h-index

  2. HR
    H. Reichl

    Fraunhofer Institute for Reliability and Microintegration, Germany

    24 publications · 574 citations

    15

    h-index

  3. JH
    John H. Lau

    Industrial Technology Research Institute, Taiwan

    17 publications · 513 citations

    15

    h-index

  4. KP
    Kyung‐Wook Paik

    Korea Advanced Institute of Science and Technology, South Korea

    19 publications · 483 citations

    14

    h-index

  5. PS
    Paul S. Ho

    The University of Texas at Austin, United States

    15 publications · 602 citations

    12

    h-index

1–5 of 4.5K

Institutions

648

  1. Georgia Institute of Technology

    Atlanta, United States

    28 h-index

    238 publications

    6.9K citations

  2. Intel (United States)

    Santa Clara, United States

    25 h-index

    214 publications

    11.1K citations

  3. IBM (United States)

    Armonk, United States

    22 h-index

    116 publications

    4.3K citations

  4. Motorola (United States)

    Schaumburg, United States

    21 h-index

    120 publications

    5.2K citations

  5. IBM Research - Thomas J. Watson Research Center

    Yorktown Heights, United States

    20 h-index

    127 publications

    10.8K citations

  6. Fraunhofer Institute for Reliability and Microintegration

    Berlin, Germany

    18 h-index

    125 publications

    2.9K citations

  7. Nanyang Technological University

    Singapore, Singapore

    18 h-index

    70 publications

    2.2K citations

  8. Korea Advanced Institute of Science and Technology

    Daejeon, South Korea

    17 h-index

    98 publications

    2.4K citations

1–8 of 648

Venues

  1. Microelectronics Reliability

    76 publications · 2.6K citations

    31

    h-index

  2. 28

    h-index

  3. Journal of Electronic Packaging

    34 publications · 977 citations

    19

    h-index

  4. Journal of Electronic Materials

    JEM · 33 publications · 735 citations

    19

    h-index

  5. IEEE Transactions on Advanced Packaging

    39 publications · 1.3K citations

    18

    h-index

1–5