Advanced Analysis of WLCSP Copper Interconnect Reliability under Board Level Drop Test

Abstract

The Wafer Level Chip Scale Package (WLCSP) is gaining popularity for its performance and for its ability to meet miniaturization requirements of portable consumer electronics, such as cell phones. Due to differential bending between the silicon die and the PCB and the large stiffness difference, board level drop/bend tests are widely accepted methods to evaluate damage in the parts when a handheld device is dropped by the consumer. Through an aggressive product development program which includes experiment and simulation Amkor has developed the next level of WLCSP (CSP <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">nlTM</sup> ), a product which exhibits superior board level reliability when subjected to drop impact, a strong requirement for portable electronics. The common industrial qualification criterion is for the product to withstand at least 40 drops before first failure (FF) under the JEDEC drop test condition of 1500 G/0.5 ms. With optimal CSP <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">nl</sup> and PCB designs, recent test results show that a typical Amkor CSP <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">nl</sup> with a die size of 5.4 mm × 5.4 mm has a minimum failure-free life of over 1000 drops. For an enhanced CSP <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">nl</sup> design, first-failure life of 4860 drops. was recorded in actual drop testing. These excellent results imply that much larger die are possible for future CSP <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">nl</sup> products, opening the door for wider applications of WLCSP devices, e.g. in next-generation portable electronics with greater function integration.