IEEE Transactions on Semiconductor Manufacturing · 2004 · 36 citations · 10 references
EngineeringElectrical EngineeringMicroelectronicsSemiconductor DevicesVlsi DesignDesign For TestabilityDevice CharacterizationDevice ModelingDevice ScalingIntegrated Circuit DesignShort-channel EffectsDevice Scaling EffectsDevice VariabilityProcess Variation AnalysisProcess Variation CharacterizationSemiconductor Device CharacterizationThreshold VoltageThreshold Voltage Roll-offTransistor Sizing
A new test structure has been designed to evaluate fluctuations of transistor properties, both within a chip and across a 300-mm wafer. The evaluation system was established with a conventional parametric tester and dc power supplies suitable for application on production lines. It was observed that threshold voltage (V/sub th/) variations increased with the reduction of the channel area. A difference was also observed in the standard deviation (/spl sigma//sub vt/) between NMOS and PMOS. From statistical evaluations, controlling CDs and improving rolloff characteristics were found to be important to reduce V/sub th/ variations.
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