Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 2014 · 12 citations · 3 references
EngineeringElectrical EngineeringMicroelectronicsMicrofabricationVlsi DesignElectron Beam LithographyEtching ProcessesIntegrated Circuit DesignIntegrated Circuit FabricationThin-film PatterningVery-large-scale Integration LayoutDeep EtchingEtch Profile ControlEtchingLine EtchingLine PatterningPlasma EtchingSpacer DesignSurface Etching
For 11nm and below, several alternatives are still potential candidates to meet the patterning requirements. Spacer patterning, Mask Less Lithography (i.e. Electron beam lithography) and Direct Self Assembly are alternatives under development at CEA-LETI. We have demonstrated the integration of these alternative techniques in front end of line and back end of line levels. Common challenges such as minimum achievable CD, CD control through the integration steps, mask budget and LWR were compared for these techniques.
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