S. Barnola

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Publications

Citations

1.6K

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Active since

2006

Affiliations

Laboratoire d'Électronique des Technologies de l'Information(Current)

Commissariat à l'Énergie Atomique et aux Énergies Alternatives

CEA Grenoble

Université Grenoble Alpes

Institut polytechnique de Grenoble

S. Barnola is an author at Laboratoire d'Électronique des Technologies de l'Information specializing in semiconductor devices, engineering, and electrical engineering.

Publications per year

2006–2020

Publications

FDSOI devices with thin BOX and ground plane integration for 32nm node and below

C. Fenouillet-Béranger, S. Denorme, P. Perreau et al. · Solid-State Electronics · 2009 · 133 citations

Engineering, Computer Engineering, Electrical Engineering +11

15nm-diameter 3D stacked nanowires with independent gates operation: &#x03A6;FET

C. Dupré, A. Hubert, Stéphane Bécu et al. · 2008 · 111 citations

Engineering, Electrical Engineering, Microelectronics +16

Planar Fully depleted SOI technology: A powerful architecture for the 20nm node and beyond

O. Faynot, F. Andrieu, O. Weber et al. · 2010 · 104 citations

Engineering, Electrical Engineering, Microelectronics +16

Low leakage and low variability Ultra-Thin Body and Buried Oxide (UT2B) SOI technology for 20nm low power CMOS and beyond

F. Andrieu, O. Weber, J. Mazurier et al. · 2010 · 103 citations

Engineering, Computer Engineering, Electrical Engineering +17

First demonstration of a CMOS over CMOS 3D VLSI CoolCube™ integration on 300mm wafers

Laurent Brunet, P. Batude, C. Fenouillet-Béranger et al. · 2016 · 75 citations

Engineering, Computer Engineering, Electrical Engineering +16

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