Publication | Closed Access
First demonstration of a CMOS over CMOS 3D VLSI CoolCube™ integration on 300mm wafers
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2016
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EngineeringVlsi DesignIntegrated CircuitsInterconnect (Integrated Circuits)Cmos Coolcube™ IntegrationAdvanced Packaging (Semiconductors)Full 3DCmos 3DVlsi Coolcube™ IntegrationElectronic PackagingCoolcube™ Integration3D Ic ArchitectureElectrical EngineeringComputer EngineeringMicroelectronicsThree-dimensional Heterogeneous IntegrationVlsi ArchitectureApplied PhysicsFirst DemonstrationThree-dimensional Integrated Circuits3D Integration
For the first time, a full 3D CMOS over CMOS CoolCube™ integration is demonstrated with a top level compatible with state of the art high performance FDSOI (Fully-Depleted Silicon On Insulator) process requirements such as High-k/metal gate or raised source and drain. Functional 3D inverters with either PMOS or NMOS on the top level are highlighted. Furthermore, Si layer transfer above a 28nm W Metal 1 level of an industrial short loop and the return in a front end environment is presented, confirming the industrial compatibility of CoolCube™ integration.