A. Hubert

15nm-diameter 3D stacked nanowires with independent gates operation: ΦFET

C. Dupré, A. Hubert, Stéphane Bécu et al. · 2008 · 111 citations

Co-processed Finfet, Engineering, Integrated Circuits +17

Novel Si-based nanowire devices: Will they serve ultimate MOSFETs scaling or ultimate hybrid integration?

T. Ernst, Laurent Duraffourg, C. Dupré et al. · 2008 · 51 citations

Cmos Scaling, Engineering, Education +22

A stacked SONOS technology, up to 4 levels and 6nm crystalline nanowires, with gate-all-around or independent gates (Φ-Flash), suitable for full 3D integration.

A. Hubert, Emmanuel Nowak, K. Tachi et al. · HAL (Le Centre pour la Communication Scientifique Directe) · 2009 · 40 citations

Experimental study on carrier transport limiting phenomena in 10 nm width nanowire CMOS transistors

K. Tachi, M. Cassé, Sylvain Barraud et al. · 2010 · 37 citations

Engineering, Nanodevices, Nanowire Transport Properties +18

Relationship between mobility and high-k interface properties in advanced Si and SiGe nanowires

K. Tachi, M. Cassé, Doyoung Jang et al. · 2009 · 35 citations

Engineering, Integrated Circuits, Silicon On Insulator +16