Line Patterning
Line Patterning is a lithographic fabrication technique within interconnect formation that defines the geometric arrangement of conductive pathways on a semiconductor substrate by selectively transferring a patterned resist mask onto an underlying thin film layer through etching or deposition processes.
103
Publications
3.5K
Citations
504
Authors
132
Institutions
Publications per year
2017–2026
12
Parents
103
22nm half-pitch patterning by CVD spacer self alignment double patterning (SADP)
Chris Bencher, Yong Mei Chen, Huixiong Dai et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 2008 · 129 citations
Engineering, Manufacturing Engineering, Materials Science +17
1–5 of 103
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Fraunhofer Institute for Reliability and Microintegration, Germany
3 publications · 77 citations
3
h-index
1–5 of 504
132
IMEC
Leuven, Belgium
6 h-index
49 publications
1.2K citations
Massachusetts Institute of Technology
Cambridge, United States
5 h-index
11 publications
812 citations
Imec the Netherlands
Eindhoven, Netherlands
5 h-index
13 publications
372 citations
Paul Scherrer Institute
Villigen, Switzerland
4 h-index
12 publications
560 citations

National Institute of Advanced Industrial Science and Technology
Tsukuba, Japan
4 h-index
8 publications
127 citations
Tokyo Electron (Japan)
Tokyo, Japan
4 h-index
36 publications
841 citations

University of Yamanashi
Kofu, Japan
3 h-index
9 publications
528 citations
University of Chicago
Chicago, United States
3 h-index
8 publications
104 citations
1–8 of 132
18 publications · 506 citations
14
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7 publications · 359 citations
7
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7 publications · 271 citations
7
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3 publications · 81 citations
3
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JMM · 3 publications · 86 citations
3
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