N. Possémé

Vertically stacked-NanoWires MOSFETs in a replacement metal gate process with inner spacer and SiGe source/drain

Sylvain Barraud, V. Lapras, Marie-Pierre Samson et al. · 2016 · 110 citations · Full text

Engineering, Electrical Engineering, Materials Science +17

Planar Fully depleted SOI technology: A powerful architecture for the 20nm node and beyond

O. Faynot, F. Andrieu, O. Weber et al. · 2010 · 104 citations

Engineering, Electrical Engineering, Microelectronics +16

Mechanisms of porous dielectric film modification induced by reducing and oxidizing ash plasmas

N. Possémé, T. Chevolleau, Maxime Darnon et al. · Journal of Vacuum Science & Technology B Microelectronics and Nanometer Structures Processing Measurement and Phenomena · 2007 · 78 citations · Full text

Natural Sciences, Materials Engineering, Materials Science +17

First demonstration of a CMOS over CMOS 3D VLSI CoolCube™ integration on 300mm wafers

Laurent Brunet, P. Batude, C. Fenouillet-Béranger et al. · 2016 · 75 citations

Engineering, Computer Engineering, Electrical Engineering +16

Etching mechanisms of low-<i>k</i> SiOCH and selectivity to SiCH and SiO2 in fluorocarbon based plasmas

N. Possémé, T. Chevolleau, O. Joubert et al. · Journal of Vacuum Science & Technology B Microelectronics and Nanometer Structures Processing Measurement and Phenomena · 2003 · 68 citations

Natural Sciences, Materials Engineering, Materials Science +17