Marie-Pierre Samson

Performance and design considerations for gate-all-around stacked-NanoWires FETs

Sylvain Barraud, V. Lapras, B. Prévitali et al. · 2017 · 147 citations · Full text

Electrical Engineering, Gate-all-around Stacked-nanowires Fets, Engineering +10

Vertically stacked-NanoWires MOSFETs in a replacement metal gate process with inner spacer and SiGe source/drain

Sylvain Barraud, V. Lapras, Marie-Pierre Samson et al. · 2016 · 108 citations · Full text

Engineering, Inner Spacer, Integrated Circuits +16

Strain-Induced Performance Enhancement of Trigate and Omega-Gate Nanowire FETs Scaled Down to 10-nm Width

R. Coquand, M. Cassé, Sylvain Barraud et al. · IEEE Transactions on Electron Devices · 2013 · 68 citations

Semiconductors, Semiconductor Technology, Electrical Engineering +15

Scaling of high-k/metal-gate Trigate SOI nanowire transistors down to 10nm width

R. Coquand, Sylvain Barraud, M. Cassé et al. · 2012 · 57 citations

Electrical Engineering, Si Film Thickness, Engineering +9

Highly performant double gate MOSFET realized with SON process

S. Harrison, P. Coronel, F. Leverd et al. · 2004 · 54 citations

Electrical Engineering, Engineering, Son Process +10