All Affiliations
| # | Concept | H-Index | Publications | Citations |
|---|---|---|---|---|
1 | Engineering | 20 | 40 | 1.3K |
2 | Applied Physics | 17 | 25 | 765 |
3 | Natural Sciences | 3 | 3 | 65 |
4 | Education | 2 | 2 | 33 |
5 | Social Sciences | 1 | 1 | 20 |
Philippe Soussan
×
45
Publications
1.3K
Citations
20
H-Index
| Year | Citations | |
|---|---|---|
2010 | 119 | |
2012 | 111 | |
2010 | 96 | |
2008 | 86 | |
2014 | 66 | |
3-D Wafer-Level Packaging Die Stacking Using Spin-on-Dielectric Polymer Liner Through-Silicon Vias Yann Civale, Deniz Sabuncuoglu Tezcan, Harold Philipsen, IEEE Transactions on Components Packaging and Manufacturing Technology EngineeringIntegrated CircuitsTemporary CarriersWafer Scale ProcessingAdvanced Packaging (Semiconductors) | 2011 | 50 |
2009 | 48 | |
2021 | 44 | |
2008 | 37 | |
2019 | 36 |
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