Cu/Sn microbumps interconnect for 3D TSV chip stacking

Abstract

The electronics industry is increasingly looking to 3D integration in order to address the ever continuing product needs of miniaturization and performance increase for future generation of ICs. Most of these integration schemes require multiple die stacking on top of each other. In this work, transient liquid phase (TLP) bonding technique using Cu-Sn intermetallic is used for die stacking. Fast die to wafer pick and place operation followed by collective bonding process is described here for bonding application. Low temperature stacking is also explored using solid metal bonding (SMB) process and the effect of various cleaning agents on the bonding interface is discussed. Finally, in this paper we report on die stacking using microbumps with dies containing through silicon visa (TSV).