Threshold voltage hysteresis in SiC MOSFETs and its impact on circuit operation

Abstract

Threshold voltage hysteresis in SiC power MOSFETs is rarely studied. This work investigates the capture- and emission-time constants of positive and negative charge trapped in the gate oxide and interface as a function of gate bias. We present a measurement technique which enables measurement of the real Vth during application-relevant bipolar AC gate stress. We show that threshold voltage hysteresis has no harmful effect on switching operation.