Line Depletion Electromigration Characterization of Cu Interconnects

Abstract

Specific details of both fabrication process and geometry of Cu interconnects result in different electromigration (EM) fail modes. This paper discusses EM characteristics of line depletion stress, i.e., for the case of electrons flowing from a via above into a Cu line through a Cu diffusion barrier to cause voiding in the line. For electrons flowing from a W via, for example to a Cu line above, electrical redundancy (i.e., a current shunt layer) exists due to the overlap of line bottom liner over the top of the via, such that a current path still exists in the event that the Cu is removed. When electrons flow from a via above down to a Cu line, the redundancy characteristics can be very different for different via/line layouts, and can result in different EM fail distributions. The solid contact between via above and the liner of the line below can result in tight fail distributions, while weak contact or lack of contact between the via above and the liner of the line below can cause broad (high sigma), or even multimode fail distributions. A few examples and their implications on robust interconnect design are presented. The relation between void size and liner redundancy characteristics is also discussed.