Investigation of via-dominated multi-modal electromigration failure distributions in dual damascene Cu interconnects with a discussion of the statistical implications

Abstract

Electromigration is a well-known wearout mechanism for metallic interconnects on integrated circuit chips, and has been studied for decades in Al metallization, and for the last several years in Cu metallization. Chip failure is caused by either catastrophic electrical open or by resistance shifts sufficiently large to cause functional failure. The failure mechanism is the creation of a hole or void in the primary conductive layer of the interconnect, caused by a divergence in atomic diffusion in the direction of electron flow. Electromigration results for a 264 sample electromigration study performed on dual damascene copper interconnects are presented and reviewed. The stress results show multi-modal failure distributions and extensive failure analysis provides possible explanations as to the failure modes. Monte Carlo type simulations are used to investigate the statistical implications of using bi-modal fitting to predict reliability performance.