2008 · 27 citations · 13 references
EngineeringElectrical EngineeringMaterials ScienceElectronic MaterialsPackaging DesignSemiconductor DevicesChip PackagingDevice ReliabilityIntegrated Circuit DesignInterconnect TechnologySemiconductor ReliabilityWafer BondingDiceElectrical InterconnectsElectromigration AnalysisElectromigration ReliabilityFailure MechanismsInterconnect ReliabilityThree-dimensional IntegrationWire Bonding
There is significant interest in 3D interconnect technology due to its capability to provide fast, efficient inter-die interconnects at a minimum package footprint. Intermetallic Cu-Sn bonding has been widely investigated for 3D interconnects. However, the electromigration (EM) intrinsic reliability of the 3D Cu-Sn die-to-die microconnects has not been reported. In this paper the EM performance of 3D Cu-Sn microconnects formed by thermo-compression bonding is investigated and the failure mechanisms are discussed. The 3D stacked dice were assembled in wire bond ceramic packages and EM tests were conducted in both air and nitrogen ambient at various temperatures. Microconnect chain and Kelvin structure's failure lifetime and the mean time to failure (MTTF) were measured. The failure analysis has been conducted and the possible failure mechanism has been proposed.
13
Process integration of 3D chip stack with vertical interconnection
Kenji Takahashi, Yuichi Taguchi, M. Tomisaka et al. · 2004 · 84 citations
Engineering, Electrical Engineering, Materials Engineering +17
Thermal analysis of vertically integrated circuits
M.B. Kleiner, S.A. Kuhn, Peter Ramm et al. · 1995 · 72 citations
Engineering, Computer Engineering, Electrical Engineering +14