Method to Distinguish Between Buffer and Surface Trapping in Stressed Normally-ON GaN GITs Using the Gate-Voltage Dependence of Recovery Time Constants

Boris Butej, Valeria Padovan, D. Pogány, Gregor Pobegen, Clemens Ostermaier, Christian Koller

IEEE Transactions on Electron Devices · 2022 · 17 citations · 28 references

Concepts

Abstract

Drain current recovery transients are analyzed in normally-ON (NON) gate injection transistors (GITs) subjected to different kinds of stress. The recovery is measured as a function of forward gate bias, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {G}}$ </tex-math></inline-formula> , which controls the number of holes injected from the gate and speeds up the recovery. Unlike conventional normally-OFF GITs, the newly designed NON GIT test structures allow simple characterization of buffer trapping during back-gating. By comparing the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {G}}$ </tex-math></inline-formula> -dependence of recovery time constants for OFF-state and semi- ON state stress with those obtained from back-gating experiments we are able to distinguish between buffer and surface trapping. Our approach is simple and does not require time-consuming temperature-dependent measurements. It is found that OFF-state stress causes negative charge accumulation in the buffer, while semi- ON state stress leads to accumulation in both, buffer and surface. The use of NON GITs enables to measure the recovery time constants related to the buffer over a wide span of six orders of magnitude ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$10^{-{4}}$ </tex-math></inline-formula> –100 s).

References

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