Strained Si and Ge MOSFETs with high-k/metal gate stack for high mobility dual channel CMOS

Abstract

Epitaxial strained Si and Ge n- and p-MOSFETs with a TiN/HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2 </sub> gate stack were fabricated with the same process for a dual channel integration scheme. Compared to the HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> /Si reference, X1.7 strained Si electron and X9 strained Ge hole mobility gains are demonstrated, achieving symmetric n- and p-MOSFET I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Dsat </sub> performance. This X9 strained Ge hole mobility enhancement highly exceeds previous reported results on Ge pMOSFETs with high-k dielectrics. For the first time, such a hole mobility enhancement, theoretically predicted and experimentally reported with thick SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2 </sub> gate dielectrics, is demonstrated with a thin high-k gate dielectric (EOT=14Aring)