C. Le Royer - Concepedia

Author

C. Le Royer

Commissariat à l'Énergie Atomique et aux Énergies Alternatives

Also Known As

C Le Royer, C. Le Royer, C. Royer, C.Le Royer, Cyrille LE ROYER, Cyrille Le Royer, Cyrille le Royer, Le Royer, C., Le Royer, Cyrille

233

Publications

3.7K

Citations

H-Index

Concepts

All Affiliations

Commissariat à l'Énergie Atomique et aux Énergies Alternatives Laboratoire d'Électronique des Technologies de l'Information CEA Grenoble Institut polytechnique de Grenoble Université Grenoble Alpes

About

C. Le Royer is an author at Commissariat à l'Énergie Atomique et aux Énergies Alternatives specializing in applied physics, electrical engineering, and engineering.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	30	81	3.2K
2	Applied Physics	30	74	2.9K
3	Electrical Engineering	30	79	3K
4	Computer Engineering	14	15	816
5	Natural Sciences	1	1	19

C. Le Royer

Publications

3.2K

Citations

H-Index

Page 1

	Year	Citations
Impact of SOI, Si<inf>1-x</inf>Ge<inf>x</inf>OI and GeOI substrates on CMOS compatible Tunnel FET performance F. Mayer, C. Le Royer, J.-F. Damlencourt, Semiconductor TechnologyElectrical EngineeringEngineeringPhysicsApplied Physics	2008	237
Advances, challenges and opportunities in 3D CMOS sequential integration P. Batude, M. Vinet, B. Prévitali, Materials Science3D Ic ArchitectureWafer Scale ProcessingEngineeringVlsi Design	2011	148
TCAD simulation of SOI TFETs and calibration of non-local band-to-band tunneling model Arnab Biswas, Surya Shankar Dan, C. Le Royer, Microelectronic Engineering Device ModelingElectrical EngineeringEngineeringSoi TfetsPhysics	2012	140
Tunneling FETs on SOI: Suppression of ambipolar leakage, low-frequency noise behavior, and modeling Jing Wan, C. Le Royer, A. Zaslavsky, Solid-State Electronics Electrical EngineeringEngineeringTunneling MicroscopyPhysicsElectronic Engineering	2011	124
GeOI pMOSFETs Scaled Down to 30-nm Gate Length With Record Off-State Current Louis Hutin, C. Le Royer, J.-F. Damlencourt, IEEE Electron Device Letters EngineeringIntegrated CircuitsGeoi Pmosfets30-Nm Gate LengthSemiconductor Device	2010	122
A Compact Capacitor-Less High-Speed DRAM Using Field Effect-Controlled Charge Regeneration Jing Wan, C. Le Royer, A. Zaslavsky, IEEE Electron Device Letters Non-volatile MemoryElectrical EngineeringEngineeringMemory DesignFront Gate Capacitor	2011	118
Advances in 3D CMOS sequential integration P. Batude, M. Vinet, A. Pouydebasque, EngineeringVlsi DesignSequential Cmos IntegrationSilicon On InsulatorCmos Sequential Integration	2009	114
A tunneling field effect transistor model combining interband tunneling with channel transport Jing Wan, C. Le Royer, A. Zaslavsky, Journal of Applied Physics Device ModelingElectrical EngineeringSemiconductor DeviceEngineeringTunneling Microscopy	2011	96
Tunneling field-effect transistor with epitaxial junction in thin germanium-on-insulator Dimitrios Kazazis, Pooya Jannaty, A. Zaslavsky, Applied Physics Letters Semiconductor TechnologyElectrical EngineeringElectronic DevicesLow TemperaturesEngineering	2009	84
A feedback silicon-on-insulator steep switching device with gate-controlled carrier injection Jing Wan, S. Cristoloveanu, C. Le Royer, Solid-State Electronics Electrical EngineeringEngineeringNanoelectronicsSilicon On InsulatorMicroelectronics	2012	76

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