Assembly and reliability characterization of 3D chip stacking with 30μm pitch lead-free solder micro bump interconnection

Abstract

Recently, the three-dimensional chip stacking technology with fine pitch and high input/output interconnects has emerged due to the requirements of multi-function and high performance in electronic devices. When the electronic packaging technology develops toward the miniaturization trend, the reliability of interconnect with fine pitch and high density solder bump interconnections will become a critical issue in advanced 3D chip stacking technology. In this study, assembly of chip-on-chip test vehicle with a micro bump pitch of 30 μm was demonstrated and the joint reliability was also evaluated. The Si chip/carrier used in this study had more than 3000 micro bumps with Sn2.5Ag solder material. Ni/Cu under bump metallurgy layer (UBM) was selected on both the top and bottom chip. 3D chip stacking was achieved by thermo-bonding and subsequently underfill dispensing for fine gap filling was also conducted with different kinds of underfills. The temperature cycling test was performed on the chip-on-chip stacking module over 1000 cycles. In addition, with the joint size becoming small, the current for each solder bump carried continues to increase. This leads high current flowing in each individual joint. Therefore, electromigration has become a major reliability issue in microelectronic devices. In this study, electromigration in SnAg solder micro bump with a pitch of 30 μm was investigated under 0.12 A at 135°C. Electromigration characteristics of fine pitch micro bump was discussed with the microstructure evolution of micro bump during current stressing. The assembly of 3D stacking chip using two layers of chip with fine pitch and lead-free interconnects was achieved in this study. The results of reliability test showed that the reliability of fine pitch solder micro bump interconnections was acceptable under mechanical and electrical evaluations.