Fundamentals of timing information for test: How simple can we get?

Abstract

Testing for small delay defects requires ATPG-FS tools to understand timing information of the design such that transition delay faults can be detected along longer paths. In this paper, timing information is analyzed for use in test automation tools to test for small delay defects. Fundamentals of static timing analysis are analyzed with regard to test. This paper concludes that Signal Integrity information can be ignored by test automation tools when timing information is used to guide ATPG tools towards longer paths. This paper also shows that a lack of understanding of clock trees in the long path ATPG algorithm leads to incorrect results.