Ravishankar Arunachalam

TACO

Ravishankar Arunachalam, Karthik Rajagopal, Lawrence T. Pileggi · 2000 · 123 citations · Full text

Tight Bounds, Electrical Engineering, Physical Design (Electronics) +10

Determination of worst-case aggressor alignment for delay calculation

Paul D. Gross, Ravishankar Arunachalam, Karthik Rajagopal et al. · 1998 · 111 citations

Mathematical Programming, Engineering, Vlsi Design +16

Optimal shielding/spacing metrics for low power design

Ravishankar Arunachalam, Erdem Acar, Sani Nassif · 2003 · 77 citations

Engineering, Vlsi Design, Power Optimization (Eda) +19

CMOS gate delay models for general RLC loading

Ravishankar Arunachalam, Florentin Dartu, Lawrence T. Pileggi · 2002 · 65 citations

Device Modeling, Electrical Engineering, Physical Design (Electronics) +13

False coupling interactions in static timing analysis

Ravishankar Arunachalam, R.D. Blanton, Lawrence T. Pileggi · 2001 · 32 citations

Engineering, Vlsi Design, Electronic Design Automation +19