Ron Press

High-frequency, at-speed scan testing

Xijiiang Lin, Ron Press, Janusz Rajski et al. · IEEE Design & Test of Computers · 2003 · 155 citations

Internal Pll, Engineering, Measurement +20

Logic Design for On-Chip Test Clock Generation - Implementation Details and Impact on Delay Test Quality

Mattias Beck, O. Barondeau, Martin Kaibel et al. · Design, Automation, and Test in Europe · 2005 · 48 citations · Full text

System On Chip, Electrical Engineering, Engineering +15

Achieving High Test Quality with Reduced Pin Count Testing

J Jahangiri, Nilanjan Mukherjee, Wu-Tung Cheng et al. · 2005 · 22 citations

Engineering, Measurement, Mem Testing +18

Measures to Improve Delay Fault Testing on Low-Cost Testers - A Case Study

Mattias Beck, O. Barondeau, F. Poehl et al. · 2005 · 10 citations

Engineering, Mem Testing, Improve Delay Fault +22