Device Characteristics and Aggravated Negative Bias Temperature Instability in p-Channel Metal–Oxide–Semiconductor Field-Effect Transistors with Uniaxial Compressive Strain

Abstract

P-channel metal–oxide–semiconductor field-effect transistors (PMOSFETs) featuring poly-SiGe gates and compressive strain channels were investigated. The compressive strain in the channel was deliberately induced in this study by a plasma-enhanced chemical vapor deposition (PECVD) silicon nitride (SiN) capping layer over the gate. Our results indicate for the first time that, while strain channel engineering serves as an effective method to enhance drive current for scaled complementary metal–oxide–semiconductor (CMOS) devices consistent with literature reports, it also simultaneously aggravates the negative bias temperature instability (NBTI) of scaled devices. The aggravated NBTI behavior is ascribed to a higher amount of hydrogen incorporation during SiN deposition as well as a higher strain energy stored in the channel. Saturation phenomena in the shift of threshold voltage and generation of interface states are observed at high stress temperatures and long stress times. Moreover, transconductance degradation in devices with SiN capping is greatly aggravated under high temperature stress.