Laser Verification of Charge Sharing in a 90 nm Bulk CMOS Process

Abstract

Charge-collection circuits were designed and fabricated in a 90 nm bulk CMOS process to examine the effects of charge sharing in sub-100 nm bulk CMOS processes. Laser interrogation of the charge-collection circuits provide the first direct verification of sub-100 nm charge sharing effects and show the nodal spacing dependence of charge sharing. 3-D TCAD simulations corroborate the laser data and also show the use of guard-diodes as an effective charge sharing mitigation technique.