Concepedia

Cmos Scaling

CMOS Scaling is a technological framework in semiconductor device engineering that refers to the systematic reduction of transistor dimensions and associated interconnect features in complementary metal-oxide-semiconductor technology to enhance performance, reduce power consumption, and increase circuit density.

4.8K

Publications

234.4K

Citations

17.8K

Authors

1.7K

Institutions

Publications per year

2017–2026

921

Variants

Cmos Device Scaling

Parents

Publications

4.8K

Low-Power CMOS Digital Design

Anantha P. Chandrakasan, R.W. Brodersen · 2015 · 2.2K citations

, , +17

Low-power CMOS digital design

Anantha P. Chandrakasan, Samuel Sheng, R.W. Brodersen · IEEE Journal of Solid-State Circuits · 1992 · 2.2K citations

, , +17

Device scaling limits of Si MOSFETs and their application dependencies

D.J. Frank, R.H. Dennard, E. Nowak et al. · Proceedings of the IEEE · 2001 · 1.6K citations

, , +17

Modeling the effect of technology trends on the soft error rate of combinational logic

Premkishore Shivakumar, Michael Kistler, Stephen W. Keckler et al. · 2003 · 1.4K citations

, , +17

Silicon Photonics

Bahram Jalali, Sasan Fathpour · Journal of Lightwave Technology · 2006 · 1.4K citations

, , +15

1–5 of 4.8K

Authors

17.8K

  1. KR
    Kaushik Roy

    Purdue University West Lafayette, United States

    40 publications · 2K citations

    26

    h-index

  2. SB
    Shekhar Borkar

    Intel (United States), United States

    32 publications · 3.3K citations

    25

    h-index

  3. AP
    Anantha P. Chandrakasan

    Massachusetts Institute of Technology, United States

    32 publications · 7.7K citations

    23

    h-index

  4. VD
    Vivek De

    Intel (United States), United States

    28 publications · 1.8K citations

    20

    h-index

  5. LW
    L. W. Massengill

    Vanderbilt University, United States

    24 publications · 1.3K citations

    19

    h-index

1–5 of 17.8K

Institutions

1.7K

  1. IBM (United States)

    Armonk, United States

    63 h-index

    1.4K publications

    92.1K citations

  2. Intel (United States)

    Santa Clara, United States

    61 h-index

    1.2K publications

    81.5K citations

  3. IBM Research - Thomas J. Watson Research Center

    Yorktown Heights, United States

    60 h-index

    656 publications

    67.6K citations

  4. IMEC

    Leuven, Belgium

    47 h-index

    1.8K publications

    70.2K citations

  5. University of California, Berkeley

    Berkeley, United States

    46 h-index

    369 publications

    45.2K citations

  6. KU Leuven

    Leuven, Belgium

    41 h-index

    323 publications

    13.8K citations

  7. Massachusetts Institute of Technology

    Cambridge, United States

    41 h-index

    268 publications

    17.2K citations

  8. Stanford University

    Stanford, United States

    39 h-index

    207 publications

    15.2K citations

1–8 of 1.7K

Venues

  1. IEEE Journal of Solid-State Circuits

    314 publications · 27.3K citations

    88

    h-index

  2. IEEE Transactions on Electron Devices

    244 publications · 15.1K citations

    64

    h-index

  3. 36

    h-index

  4. IEEE Electron Device Letters

    96 publications · 4.9K citations

    36

    h-index

  5. IEEE Transactions on Nuclear Science

    68 publications · 4.8K citations

    35

    h-index

1–5