Vivek De - Concepedia

Author

Vivek De

Intel (United States)ORCID

Also Known As

Cheney, De, Vivek, Friedman, V K De, V. De, V.K. De, Valentino De, Verdiana De Caro, Vivek De, Vivek K De

443

Publications

18.3K

Citations

H-Index

183

Concepts

All Affiliations

Intel (United States)Georgia Institute of Technology Purdue University West Lafayette

About

Vivek De is an author at Intel (United States) specializing in electrical engineering, engineering, and computer engineering.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	66	231	17K
2	Natural Sciences	3	3	74
3	Education	2	2	70
4	Health Sciences	2	2	62
5	Medicine	2	2	353

Vivek De

247

Publications

17.5K

Citations

H-Index

Page 1

	Year	Citations
Parameter variations and impact on circuits and microarchitecture Shekhar Borkar, Tanay Karnik, S. Narendra, Hardware SecurityLow-power ElectronicsElectrical EngineeringPhysical Design (Electronics)Engineering	2003	1.4K
Adaptive body bias for reducing impacts of die-to-die and within-die parameter variations on microprocessor frequency and leakage James Tschanz, James Kao, S. Narendra, IEEE Journal of Solid-State Circuits Low-power ElectronicsBin Split ImprovementElectrical EngineeringPhysical Design (Electronics)Engineering	2002	721
A 48-Core IA-32 message-passing processor with DVFS in 45nm CMOS Jason Howard, Saurabh Dighe, Yatin Hoskote, Hardware SecurityElectrical EngineeringManycore ProcessorEngineeringVlsi Design	2010	597
A 48-Core IA-32 Processor in 45 nm CMOS Using On-Die Message-Passing and DVFS for Performance and Power Scaling Jason Howard, Saurabh Dighe, Sriram Vangal, IEEE Journal of Solid-State Circuits EngineeringVlsi Design48-Core Ia-32 ProcessorComputer ArchitectureInterconnection Network Architecture	2010	390
Technology and design challenges for low power and high performance Vivek De, Shekhar Borkar EngineeringEnergy EfficiencyPower Optimization (Eda)Electronic DesignComputer Architecture	1999	337
Energy-Efficient and Metastability-Immune Resilient Circuits for Dynamic Variation Tolerance Keith Bowman, James Tschanz, Nam Sung Kim, IEEE Journal of Solid-State Circuits Equal ThroughputEngineeringVlsi DesignDatapath MetastabilityArtificial Immune System	2009	337
Scaling of stack effect and its application for leakage reduction S. Narendra, Vivek De, D.A. Antoniadis, Leakage (Machine Learning)Electrical EngineeringEngineeringVlsi DesignTechnology Scaling	2001	331
A stochastic wire-length distribution for gigascale integration (GSI). I. Derivation and validation Jeffrey A. Davis, Vivek De, J.D. Meindl IEEE Transactions on Electron Devices EngineeringVlsi DesignComputer ArchitectureStochastic Wire-length DistributionInterconnect (Integrated Circuits)	1998	330
A new technique for standby leakage reduction in high-performance circuits Y. Ye, Shekhar Borkar, Vivek De Low-power ElectronicsHardware SecurityElectrical EngineeringEngineeringVlsi Design	2002	321
Design and optimization of dual-threshold circuits for low-voltage low-power applications Lili Wei, Zhixiang Chen, Kaushik Roy, IEEE Transactions on Very Large Scale Integration (VLSI) Systems Low-power ElectronicsHardware SecurityElectrical EngineeringPower-aware ComputingEngineering	1999	306

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