James Kao - Concepedia

Author

James Kao

Massachusetts Institute of Technology

Also Known As

J.T. Kao, James Kao, James T. Kao

Publications

2.2K

Citations

H-Index

Concepts

All Affiliations

Massachusetts Institute of Technology Silicon Labs (United States)Intel (United States)

About

James Kao is an author at Massachusetts Institute of Technology specializing in engineering, computer engineering, and power-aware design.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	8	8	2.1K
2	Computer Engineering	8	8	2.1K
3	Electrical Engineering	6	6	2.1K
4	Computer Architecture	6	6	2.1K
5	Antenna	1	1	15

James Kao

Publications

2.1K

Citations

H-Index

Page 1

	Year	Citations
Adaptive body bias for reducing impacts of die-to-die and within-die parameter variations on microprocessor frequency and leakage James Tschanz, James Kao, S. Narendra, IEEE Journal of Solid-State Circuits Low-power ElectronicsBin Split ImprovementElectrical EngineeringPhysical Design (Electronics)Engineering	2002	721
Dual-threshold voltage techniques for low-power digital circuits James Kao, Anantha P. Chandrakasan IEEE Journal of Solid-State Circuits Low-power ElectronicsHardware SecurityElectrical EngineeringEngineeringVlsi Design	2000	439
Subthreshold leakage modeling and reduction techniques James Kao, S. Narendra, Anantha P. Chandrakasan Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design Numerical AnalysisDual Vt PartitioningEngineeringVlsi DesignPower Optimization (Eda)	2002	267
A 175-MV multiply-accumulate unit using an adaptive supply voltage and body bias architecture James Kao, M. Miyazaki, A.R. Chandrakasan IEEE Journal of Solid-State Circuits EngineeringVlsi DesignPower Optimization (Eda)Computer ArchitecturePower Electronics	2002	236
Transistor sizing issues and tool for multi-threshold CMOS technology James Kao, Anantha P. Chandrakasan, D.A. Antoniadis Hardware SecurityMulti-threshold CmosElectrical EngineeringEngineeringVlsi Design	1997	213
MTCMOS hierarchical sizing based on mutual exclusive discharge patterns James Kao, S. Narendra, Anantha P. Chandrakasan Low-power ElectronicsMulti-threshold CmosElectrical EngineeringSleep Transistor SizeEngineering	1998	211
A Fully Integrated 0.13 $\mu{\hbox {m}}$ CMOS Low-IF DBS Satellite Tuner Using Automatic Signal-Path Gain and Bandwidth Calibration A. Maxim, R. Poorfard, Richard A. Johnson, IEEE Journal of Solid-State Circuits Mum CmosEngineeringAnalog-to-digital ConverterRadio FrequencyFully Integrated 0.13	2007	15
A Fully Integrated 0.13-$\mu$m CMOS Digital Low-IF DBS Satellite Tuner Using a Ring Oscillator-Based Frequency Synthesizer A. Maxim, R. Poorfard, Richard A. Johnson, IEEE Journal of Solid-State Circuits Integrated TunerSingle OscillatorEngineeringRadio FrequencyOscillators	2007	11

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