S. Narendra

Parameter variations and impact on circuits and microarchitecture

Shekhar Borkar, Tanay Karnik, S. Narendra et al. · 2003 · 1.4K citations

Hardware Security, Low-power Electronics, Electrical Engineering +14

Adaptive body bias for reducing impacts of die-to-die and within-die parameter variations on microprocessor frequency and leakage

James Tschanz, James Kao, S. Narendra et al. · IEEE Journal of Solid-State Circuits · 2002 · 721 citations

Low-power Electronics, Bin Split Improvement, Electrical Engineering +15

Scaling of stack effect and its application for leakage reduction

S. Narendra, Vivek De, D.A. Antoniadis et al. · 2001 · 331 citations

Leakage (Machine Learning), Electrical Engineering, Engineering +12

A 233-MHz 80%-87% efficient four-phase DC-DC converter utilizing air-core inductors on package

P. Hazucha, G. Schrom, Jaehong Hahn et al. · IEEE Journal of Solid-State Circuits · 2005 · 301 citations

Low-power Electronics, Pmos Transistors, Electrical Engineering +15

Dynamic sleep transistor and body bias for active leakage power control of microprocessors

James Tschanz, S. Narendra, Yibin Ye et al. · IEEE Journal of Solid-State Circuits · 2003 · 281 citations

Low-power Electronics, Hardware Security, Electrical Engineering +13