Interface Trap Density Measurement
Interface Trap Density Measurement is a semiconductor characterization metric that quantifies the density of electronic trap states at the interface between a semiconductor and an insulating layer, typically through electrical techniques such as capacitance-voltage or conductance methods, to assess interface quality and its impact on device performance.
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12.6K
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2017–2026
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National Institute of Standards and Technology, United States
7 publications · 325 citations
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IMEC
Leuven, Belgium
11 h-index
63 publications
4.5K citations

National Institute of Advanced Industrial Science and Technology
Tsukuba, Japan
9 h-index
34 publications
1.1K citations
University of Florida
Gainesville, United States
9 h-index
32 publications
2.1K citations

United States Naval Research Laboratory
Washington, United States
9 h-index
26 publications
1.1K citations
The University of Tokyo
Tokyo, Japan
9 h-index
26 publications
2.1K citations
Purdue University West Lafayette
West Lafayette, United States
8 h-index
32 publications
1K citations
Stanford University
Stanford, United States
8 h-index
26 publications
3.8K citations
National University of Singapore
Singapore, Singapore
8 h-index
22 publications
706 citations
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52 publications · 2.7K citations
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