Interface Trap Density Measurement

Interface Trap Density Measurement is a semiconductor characterization metric that quantifies the density of electronic trap states at the interface between a semiconductor and an insulating layer, typically through electrical techniques such as capacitance-voltage or conductance methods, to assess interface quality and its impact on device performance.

291

Publications

12.6K

Citations

1.1K

Authors

298

Institutions

Publications per year

2017–2026

49

Authors

1.1K

  1. ST
    Shinichi Takagi

    The University of Tokyo, Japan

    8 publications · 596 citations

    8

    h-index

  2. JS
    John S. Suehle

    National Institute of Standards and Technology, United States

    7 publications · 325 citations

    7

    h-index

  3. DM
    Daniel M. Fleetwood

    Vanderbilt University, United States

    6 publications · 346 citations

    6

    h-index

  4. GG
    G. Groeseneken

    IMEC, Belgium

    6 publications · 654 citations

    6

    h-index

  5. CS
    Chih‐Tang Sah

    University of Illinois Urbana-Champaign, United States

    5 publications · 276 citations

    5

    h-index

1–5 of 1.1K

Venues

  1. Applied Physics Letters

    52 publications · 2.7K citations

    26

    h-index

  2. Journal of Applied Physics

    37 publications · 2.4K citations

    22

    h-index

  3. IEEE Transactions on Electron Devices

    29 publications · 1.7K citations

    20

    h-index

  4. IEEE Electron Device Letters

    32 publications · 998 citations

    19

    h-index

  5. IEEE Transactions on Nuclear Science

    13 publications · 516 citations

    13

    h-index

1–5