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Evidence of low interface trap density in GeO2∕Ge metal-oxide-semiconductor structures fabricated by thermal oxidation
318
Citations
16
References
2008
Year
Materials ScienceOxide HeterostructuresSemiconductor TechnologySemiconductor DeviceEngineeringInterface Trap DensityOxide ElectronicsOxide SemiconductorsApplied PhysicsSurface ScienceDirect OxidationDirect Thermal OxidationSemiconductor MaterialThermal OxidationSemiconductor Device FabricationElectronic PackagingGeo2∕ge Metal-oxide-semiconductor Structures
We have fabricated GeO2∕Ge metal-oxide-semiconductor (MOS) structures by direct thermal oxidation of Ge substrates. The interface trap density (Dit) of Al∕GeO2∕Ge MOS structures, measured by the low temperature conductance method including the effect of the surface potential fluctuation, is found to be reduced as the oxidation temperature increases. The minimum values of Dit can be obtained for the oxidation around 575°C, which is in the maximum temperature range where GeO volatilization does not occur under atmospheric pressure of O2. It is also found that the hydrogen annealing before Al gate formation is effective for the passivation of GeO2∕Ge interface states. It is clarified, as a result, that the minimum Dit value lower than 1011cm−2eV−1 can be obtained for GeO2∕Ge MOS interfaces fabricated by direct oxidation of Ge substrates.
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