Vertical Channel-All-Around (CAA) IGZO FET With Recessed Source/Drain Structure to Improve Contact Characteristics

Concepts

EngineeringElectrical EngineeringMaterials ScienceElectronic MaterialsMicroelectronicsSemiconductor DevicesComplementary Metal-oxide-semiconductor TechnologyIntegrated Circuit DesignMetal-oxide-semiconductor Field-effect TransistorsMetal-semiconductor ContactsThin Film Electrical PropertiesThin-film TransistorsContact EngineeringContact ResistanceInterlayer CouplingInterlayer MaterialsSource-drain Engineering

Abstract

We proposed recessed source/drain(S/D) structure for vertical channel-all-around (CAA) IGZO FET to introduce contact interlayer and improve its contact characteristics. The IZO interlayer introduced between S/D and IGZO helps to reduce the contact resistance, and boosting the performance of CAA IGZO FET. The fabricated CAA IGZO FETs with 8 nm IZO interlayer show an average Ion @ Vth+1V of 32.6 μA/μm, SS of 86 mV/dec, and Vth of - 0.06 V. The Schottky barrier height qϕB is extracted to be reduced from 170 meV to 65 meV by introducing the contact interlayer, which confirms the improvement of contact characteristics.

References

Capacitor-less, Long-Retention (>400s) DRAM Cell Paving the Way towards Low-Power and High-Density Monolithic 3D DRAM

Attilio Belmonte, Hyungrock Oh, Nouredine Rassoul et al. · 2020 · 194 citations

Engineering, Electrical Engineering, Materials Science +16

Novel Vertical Channel-All-Around (CAA) In-Ga-Zn-O FET for 2T0C-DRAM With High Density Beyond 4F2 by Monolithic Stacking

Xinlv Duan, Junxiao Feng, Jiebin Niu et al. · IEEE Transactions on Electron Devices · 2022 · 174 citations

Engineering, Electrical Engineering, Materials Science +15

Vertical Channel-All-Around (CAA) IGZO FET under 50 nm CD with High Read Current of 32.8 μA/μm (Vth + 1 V), Well-performed Thermal Stability up to 120 ℃ for Low Latency, High-density 2T0C 3D DRAM Application

Kailiang Huang, Xinlv Duan, Junxiao Feng et al. · 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) · 2022 · 54 citations

Engineering, Electrical Engineering, Materials Science +16

Ultra-low Leakage IGZO-TFTs with Raised Source/Drain for Vt > 0 V and Ion > 30 µA/µm

Subhali Subhechha, Nouredine Rassoul, A. Belmonte et al. · 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) · 2022 · 47 citations

Engineering, Electrical Engineering, Materials Science +13

First Demonstration of Stacked 2T0C-DRAM Bit-Cell Constructed by Two-Layers of Vertical Channel-All-Around IGZO FETs Realizing 4F2 Area Cost

Chuanke Chen, Jinjuan Xiang, Xinlv Duan et al. · 2023 · 46 citations

Engineering, Electrical Engineering, Materials Science +12