Chuanke Chen

Vertical Channel-All-Around (CAA) IGZO FET under 50 nm CD with High Read Current of 32.8 μA/μm (V_th + 1 V), Well-performed Thermal Stability up to 120 ℃ for Low Latency, High-density 2T0C 3D DRAM Application

Kailiang Huang, Xinlv Duan, Junxiao Feng et al. · 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) · 2022 · 54 citations

Engineering, Electrical Engineering, Materials Science +16

First Demonstration of Stacked 2T0C-DRAM Bit-Cell Constructed by Two-Layers of Vertical Channel-All-Around IGZO FETs Realizing 4F² Area Cost

Chuanke Chen, Jinjuan Xiang, Xinlv Duan et al. · 2023 · 46 citations

Engineering, Electrical Engineering, Materials Science +12

Novel a-IGZO TFT Pixel Driving Circuit Using Hybrid PWM and PAM Method With Lower Power Consumption for Micro-LED Display

Shuai Li, Wanming Wu, Chuanke Chen et al. · IEEE Electron Device Letters · 2024 · 23 citations

Engineering, Electrical Engineering, Microelectronics +16

Vertical Channel-All-Around (CAA) IGZO FET With Recessed Source/Drain Structure to Improve Contact Characteristics

Chuanke Chen, Chen Gu, Yue Zhao et al. · IEEE Electron Device Letters · 2025 · 10 citations

Engineering, Electrical Engineering, Materials Science +14