2020 · 96 citations · 9 references
EngineeringMaterials EngineeringMaterials ScienceMicrofabricationSemiconductor DevicesSurface EngineeringAtomic Force MicroscopyMetal-semiconductor ContactsScanning Probe MicroscopySemiconductor SurfacesSurface ModificationWafer BondingAtomic Force Microscopy AnalysisAtomic Force Microscopy Surface AnalysisBondingDirect Wafer BondingMicroscopyPlanarizationPlanarization TechniquesWafer-to-wafer Bonding
This paper presents our approach to hybrid bond scaling to 1μm pitch and recent demonstration results. The direct wafer stacking of two Cu/SiCN surface is realized between slightly protruding Cu nano-pad on one wafer and slightly recessed, but larger, Cu nano-pad on the second wafer. The protruding nano-pad is tailored as smaller than the recessed nano-pad to compensate for the overlay tolerance in the wafer-to-wafer (W2W) bonding. To control the stability and performance of Cu nano-pad integration process, the intensive inline atomic force microscopy (AFM) and surface acoustic microscopy (SAM) characterization is used on various test structures before/after wafer bonding. The surface flatness should be less than 1 nm/μm to ensure void free bonding. This surface planarization is readily achieved for Cu pad densities up to 25%. Finally, we have demonstrated the high yield and low resistance performance across the 300mm wafer for hybrid bond pitches between 5 and 1μm.
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The 3-D Interconnect Technology Landscape
Eric Beyne · IEEE Design and Test · 2016 · 178 citations
Engineering, Computer Engineering, Electrical Engineering +16
Scalable, sub 2μm pitch, Cu/SiCN to Cu/SiCN hybrid wafer-to-wafer bonding technology
Eric Beyne, Soon-Wook Kim, Lan Peng et al. · 2017 · 135 citations