PVD TiN metal gate MOSFETs on bulk silicon and fully depleted silicon-on-insulator (FDSOI) substrates for deep sub-quarter micron CMOS technology

Abstract

We report here for the first time an evaluation of a polysilicon capped physical vapor deposited (PVD) titanium nitride (TiN) metal gate integration on sub-quarter micron CMOSFETs using bulk Si and FDSOI substrates. In addition to eliminating poly depletion effects and lowering gate line resistance, the use of the TiN gate enables lower Vt when used with FDSOI substrates instead of bulk Si. Excellent on-off and short channel characteristics can be obtained with the TiN gate. Issues associated with Leff and reliability are also discussed.