50-nm fully depleted SOI CMOS technology with HfO/sub 2/ gate dielectric and TiN gate

Abstract

In this paper, we demonstrate for the first time CMOS thin-film metal gate FDSOI devices using HfO/sub 2/ gate dielectric at the 50-nm physical gate length. Symmetric V/sub T/ is achieved for long-channel nMOS and pMOS devices using midgap TiN single metal gate with undoped channel and high-k dielectric. The devices show excellent performance with a I/sub on/=500 /spl mu/A//spl mu/m and I/sub off/=10 nA//spl mu/m at V/sub DD/=1.2 V for nMOSFET and I/sub on/=212 /spl mu/A//spl mu/m and I/sub off/=44 pA//spl mu/m at V/sub DD/=-1.2 V for pMOSFET, with a CET=30 /spl Aring/ and a gate length of 50 nm. DIBL and SS values as low as 70 mV/V nand 77 mV/dec, respectively, are obtained with a silicon film thickness of 14 nm. Ring oscillators with 15 ps stage delay at V/sub DD/=1.2 V are also realized.