High-Performance Gate-All-Around GeOI p-MOSFETs Fabricated by Rapid Melt Growth Using Plasma Nitridation and ALD $\hbox{Al}_{2}\hbox{O}_{3}$ Gate Dielectric and Self-Aligned NiGe Contacts

Jia Feng, Gaurav Thareja, Masaharu Kobayashi, Shulu Chen, Andrew W. Poon, Yun Bai, Peter B. Griffin, S.S. Wong, Yoshio Nishi, J.D. Plummer

IEEE Electron Device Letters · 2008 · 57 citations · 14 references

Concepts

Abstract

<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> Rapid melt growth was used to fabricate gate-all-around germanium-on-insulator (GeOI) p-MOSFETs with plasma-nitrided Ge surface, <formula formulatype="inline"><tex Notation="TeX">$\hbox{Al}_{2}\hbox{O}_{3}$</tex></formula> high- <formula formulatype="inline"><tex Notation="TeX">$k$</tex></formula> gate dielectric, and self-aligned NiGe contacts. The subthreshold swing is 71 mV/dec, which is better than those of the bulk and nanowire Ge p-MOSFETs reported to date. Planar GeOI p-MOSFET arrays show 40% hole mobility enhancement at a high effective field, which is as good as bulk Ge devices. </para>

References

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