J.-P. Colinge - Concepedia

Author

J.-P. Colinge

Also Known As

Colinge, J. P., Colinge, J.-P., J -P Colinge, J P Colinge, J. P. COLINGE, J. P. Colinge, J.-P. Colinge, J.P Colinge, J.P. Colinge, Jean P. Colinge

166

Publications

5.8K

Citations

H-Index

Concepts

All Affiliations

UCLouvain University of California, Davis Hewlett-Packard (United States)IMEC University College Cork

About

J.-P. Colinge is an author at UCLouvain specializing in engineering, electrical engineering, and microelectronics.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	35	74	5.1K
2	Applied Physics	29	55	3.3K
3	Computer Engineering	11	12	1.4K
4	Medicine	2	2	74
5	Education	1	1	22

J.-P. Colinge

Publications

5.4K

Citations

H-Index

Page 1

	Year	Citations
Multiple-gate SOI MOSFETs: device design guidelines Jong‐Tae Park, J.-P. Colinge IEEE Transactions on Electron Devices Device ModelingDevice Design GuidelinesElectrical EngineeringVarious Soi MosfetsEngineering	2002	484
Junctionless Nanowire Transistor (JNT): Properties and design guidelines J.-P. Colinge, Abhinav Kranti, Ran Yan, Solid-State Electronics Electrical EngineeringEngineeringNanoelectronicsElectronic EngineeringApplied Physics	2011	440
Silicon-on-insulator 'gate-all-around device' J.-P. Colinge, M.-H. Gao, A. Romano‐Rodrı́guez, Semiconductor TechnologyElectrical EngineeringEngineeringSemiconductor InterfacesSilicon-on-insulator 'Gate-all-around Device	2002	346
Substrate crosstalk reduction using SOI technology Jean‐Pierre Raskin, A. Viviani, Denis Flandre, IEEE Transactions on Electron Devices Electrical EngineeringEngineeringAdvanced Packaging (Semiconductors)MicrofabricationNanoelectronics	1997	290
Multi-gate SOI MOSFETs J.-P. Colinge Microelectronic Engineering Multi-gate Soi MosfetsElectrical EngineeringEngineeringElectronic EngineeringMicroelectronics	2007	261
Reduction of kink effect in thin-film SOI MOSFETs J.-P. Colinge IEEE Electron Device Letters Device ModelingElectrical EngineeringEngineeringHigh Voltage EngineeringSource Potential Barrier	1988	216
SOI gated resistor: CMOS without junctions J.-P. Colinge, Christopher Lee, Aryan Afzalian, Semiconductor TechnologyElectrical EngineeringEngineeringAdvanced Packaging (Semiconductors)Nanoelectronics	2009	155
Conduction mechanisms in thin-film accumulation-mode SOI p-channel MOSFETs J.-P. Colinge IEEE Transactions on Electron Devices SemiconductorsDevice ModelingElectrical EngineeringSemiconductor TechnologyEngineering	1990	146
Accurate SOI MOSFET characterization at microwave frequencies for device performance optimization and analog modeling Jean‐Pierre Raskin, Renaud Gillon, Jian Chen, IEEE Transactions on Electron Devices Device ModelingElectrical EngineeringCalibration StructuresEngineeringMicrowave Frequencies	1998	137
Quantum-mechanical effects in trigate SOI MOSFETs J.-P. Colinge, J. Alderman, Weize Xiong, IEEE Transactions on Electron Devices Device ModelingQuantum ScienceElectrical EngineeringClassical Poisson SolversEngineering	2006	131

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