Jean‐Pierre Raskin

Author

Jean‐Pierre Raskin

Also Known As

Bich-Yen Nguyen, C. Craeye, Cordier, Patrick, Flandre, D, J .P. Raskin, J P Raskin, J RASKIN, J. -P. Raskin, J. P Raskin, J. P. Raskin

1.1K

Publications

10.5K

Citations

H-Index

199

Concepts

All Affiliations

UCLouvain Centre National de la Recherche Scientifique Université Grenoble Alpes IMEC Institut polytechnique de Grenoble

About

Jean‐Pierre Raskin is an author at UCLouvain specializing in engineering, microelectronics, and applied physics.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	48	209	7.8K
2	Applied Physics	37	133	4.9K
3	Education	3	3	67
4	Business	2	2	62
5	Social Sciences	2	2	41

Jean‐Pierre Raskin

246

Publications

8.8K

Citations

H-Index

Page 1

	Year	Citations
Raman and XPS characterization of vanadium oxide thin films with temperature Ferran Ureña-Begara, Aurélian Crunteanu, Jean‐Pierre Raskin Applied Surface Science Materials ScienceMaterial AnalysisEngineeringOxide ElectronicsSurface Science	2017	322
Substrate crosstalk reduction using SOI technology Jean‐Pierre Raskin, A. Viviani, Denis Flandre, IEEE Transactions on Electron Devices Electrical EngineeringEngineeringAdvanced Packaging (Semiconductors)MicrofabricationNanoelectronics	1997	290
Accurate SOI MOSFET characterization at microwave frequencies for device performance optimization and analog modeling Jean‐Pierre Raskin, Renaud Gillon, Jian Chen, IEEE Transactions on Electron Devices Device ModelingElectrical EngineeringCalibration StructuresEngineeringMicrowave Frequencies	1998	137
New substrate passivation method dedicated to HR SOI wafer fabrication with increased substrate resistivity Dimitri Lederer, Jean‐Pierre Raskin IEEE Electron Device Letters EngineeringSilicon On InsulatorSemiconductor DeviceWafer Scale ProcessingAdvanced Packaging (Semiconductors)	2005	132
Effective resistivity of fully-processed SOI substrates Dimitri Lederer, Jean‐Pierre Raskin Solid-State Electronics Materials ScienceEngineeringSurface ScienceSemiconductor Device FabricationEffective Resistivity	2005	129
Inter- and intragranular plasticity mechanisms in ultrafine-grained Al thin films: An in situ TEM study F. Mompiou, M. Legros, A. Boé, Acta Materialia Materials ScienceMaterials EngineeringAluminium NitrideMaterial AnalysisEngineering	2012	126
What are the limiting parameters of deep-submicron MOSFETs for high frequency applications? G. Dambrine, C. Raynaud, Dimitri Lederer, IEEE Electron Device Letters Device ModelingLow-power ElectronicsElectrical EngineeringEngineeringVlsi Design	2003	119
Analog/RF performance of multiple gate SOI devices: wideband simulations and characterization Jean‐Pierre Raskin, Tsung Ming Chung, Valeriya Kilchytska, IEEE Transactions on Electron Devices Device ModelingInternational RoadmapElectrical EngineeringPlanar Double-gateEngineering	2006	116
Low-temperature wafer bonding: a study of void formation and influence on bonding strength Xuan Xiong Zhang, Jean‐Pierre Raskin Journal of Microelectromechanical Systems EngineeringLow-temperature Wafer BondingVacuum DeviceSilicon On InsulatorPlasma Processing	2005	113
Laterally asymmetric channel engineering in fully depleted double gate SOI MOSFETs for high performance analog applications Abhinav Kranti, Tsung Ming Chung, Denis Flandre, Solid-State Electronics Electrical EngineeringEngineeringMixed-signal Integrated CircuitBias Temperature InstabilityAsymmetric Channel Engineering	2004	110

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