2003 · 402 citations · 18 references
EngineeringComputer EngineeringElectrical EngineeringComputer-integrated ManufacturingEmbedded SystemsBuilt-in Self-testDesign For TestabilityTestbenchesCompressionEmbedded Deterministic TestEmbedded TestEmbedded TestabilityEmbedded TestingScan Time ReductionSiliconTest Data Reduction
This paper introduces embedded deterministic test (EDT) technology, which reduces manufacturing test cost by providing one to two orders of magnitude reduction in scan test data volume and scan test time. The EDT architecture, the compression algorithm, design flow, experimental results, and silicon implementation are presented.
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LFSR-coded test patterns for scan designs
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Logic BIST for large industrial designs: real issues and case studies
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