IEEE Transactions on Nanotechnology · 2005 · 255 citations · 29 references
EngineeringElectrical EngineeringMaterials ScienceMicroelectronicsSemiconductor DevicesSemiconductor MaterialsDevice CharacterizationDevice ModelingDevice SimulationMetal-oxide-semiconductor Field-effect TransistorsSemiconductor PhysicsShort-channel EffectsDrain-induced Barrier LoweringDual-gate Field-effect TransistorsElectric Field ScreeningMosfet ModelingSilicon-on-insulator TechnologySurface PotentialThreshold VoltageThreshold Voltage Modeling
In this paper, we present the unique features exhibited by a modified asymmetrical double-gate (DG) silicon-on-insulator (SOI) MOSFET. The proposed structure is similar to that of the asymmetrical DG SOI MOSFET with the exception that the front gate consists of two materials. The resulting modified structure, i.e., a dual-material double-gate (DMDG) SOI MOSFET, exhibits significantly reduced short-channel effects (SCEs) when compared with the DG SOI MOSFET. SCEs in this structure have been studied by developing an analytical model. The model includes the calculation of the surface potential, electric field, threshold voltage, and drain-induced barrier lowering. A model for the drain current, transconductance, drain conductance, and voltage gain is also discussed. It is seen that SCEs in this structure are suppressed because of the perceivable step in the surface-potential profile, which screens the drain potential. We further demonstrate that the proposed DMDG structure provides a simultaneous increase in the transconductance and a decrease in the drain conductance when compared with the DG structure. The results predicted by the model are compared with those obtained by two-dimensional simulation to verify the accuracy of the proposed analytical model.
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Device scaling limits of Si MOSFETs and their application dependencies
D.J. Frank, R.H. Dennard, E. Nowak et al. · Proceedings of the IEEE · 2001 · 1.6K citations
Engineering, Computer Engineering, Electrical Engineering +17
Scaling theory for double-gate SOI MOSFET's
Ken Suzuki, Tetsu Tanaka, Y. Tosaka et al. · IEEE Transactions on Electron Devices · 1993 · 556 citations · Full text
Engineering, Electrical Engineering, Electronic Materials +16