IEEE Transactions on Electron Devices · 1989 · 10 citations · 16 references
EngineeringElectrical EngineeringMaterials ScienceMicroelectronicsSemiconductor DevicesSemiconductor MaterialsDevice CharacterizationDopingIon ImplantationMetal-oxide-semiconductor Field-effect TransistorsSemiconductor Device MaterialsSemiconductor InterfacesCmos Fabrication ProcessesDopant DiffusionDopant EffectsDopant ImplantationPolycrystalline SiliconRapid Thermal AnnealingSemiconductor Doping ProfilesThermal Annealing
Dual work function gate electrodes have been implemented in a 1- mu m CMOS process. Dopant atoms were implanted into tungsten silicide simultaneously with the source-drain implantations and subsequently diffused into the underlying polycrystalline silicon layer by rapid thermal annealing. Physical analyses showed that arsenic and boron could easily be incorporated in the polysilicon to concentrations greater than 10/sup 20/ cm/sup -3/. Capacitor and transistor measurements confirmed that n/sup +/ and p/sup +/ silicon could be obtained, with a difference of about 1 V between the respective flat-band voltages. By comparison with conventional n-type gate MOSFETs, it was verified that significantly improved subthreshold characteristics were obtained with p-type PMOS gate electrodes.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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A symmetric submicron CMOS technology
S.J. Hillenius, R. Liu, G. E. Georgiou et al. · 1986 · 66 citations