G.J. Hu

Design tradeoffs between surface and buried-channel FET's

G.J. Hu, Richard H. Bruce · IEEE Transactions on Electron Devices · 1985 · 314 citations

Buried-mode P-channel Fet, Engineering, Integrated Circuits +17

Relationship between trapped holes and interface states in MOS capacitors

G.J. Hu, W. C. Johnson · Applied Physics Letters · 1980 · 119 citations

Materials Science, Electrical Engineering, Interface Structure +13

A better understanding of CMOS latch-up

G.J. Hu · IEEE Transactions on Electron Devices · 1984 · 84 citations

Hardware Security, Device Modeling, Electrical Engineering +14

A CMOS Structure with high latchup holding voltage

G.J. Hu, Richard H. Bruce · IEEE Electron Device Letters · 1984 · 59 citations

Hardware Security, Electrical Engineering, Engineering +12

Relationship between x-ray-produced holes and interface states in metal-oxide-semiconductor capacitors

G.J. Hu, W. C. Johnson · Journal of Applied Physics · 1983 · 54 citations

X-ray Spectroscopy, Engineering, Integrated Circuits +17