Test circuits for fast and reliable assessment of CDM robustness of I/O stages

ESD in silicon integrated circuits

Microelectronics Reliability · 1996 · 442 citations

Engineering, Electrical Engineering, Microelectronics +9

Very-fast transmission line pulsing of integrated structures and the charged device model

Gieser, Haunschild · 1996 · 90 citations

Engineering, Electrical Engineering, Physics +16

Characterization and modeling of transient device behavior under CDM ESD stress

Joost Willemen, A. Andreini, V. De Heyn et al. · Journal of Electrostatics · 2004 · 30 citations

Engineering, Electrical Engineering, Electronic Materials +12

Electrical characterisation of a power SO-package in the context of electrostatic discharge

I. Doerr, Horst Gieser, Grit Sommer et al. · 2003 · 15 citations

Engineering, Electrical Engineering, Circuit Theory +16

A traceable method for the arc-free characterization and modeling of CDM testers and pulse metrology chains

Horst Gieser, Heinrich Wolf, Wolfgang Soldner et al. · Publikationsdatenbank der Fraunhofer-Gesellschaft (Fraunhofer-Gesellschaft) · 2003 · 14 citations

Engineering, Electrical Engineering, Circuit Theory +8