Effect of Stress-Induced Degradation in LDMOS $\hbox{1}/f$ Noise Characteristics

Md. Iqbal Mahmud, P. H. Hao, P. Srinivasan, Fan-Chi Hou, Benjamin L. Amey, S. Pendharkar

IEEE Electron Device Letters · 2011 · 20 citations · 8 references

Concepts

Abstract

Low-frequency noise in double reduced-surface-field lateral-double-diffused-MOS devices has been measured, and the effect of dc stressing is analyzed. The noise components contributing from the extended drain regions under the gate and field oxides were differentiated from the channel noise by a series of experimental and analytical techniques. The effect of voltage stressing on each noise component was investigated. Trapped-charge carrier fluctuations due to Si/SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> interface traps in the overlap region in the extended drain as well as in the channel were found to be the dominant source of noise. The bulk resistance fluctuations in the extended drain region under the field oxide were found to be insignificant. High-voltage stressing caused an increase in the interface traps, thus increasing both the extended drain overlap resistance and the noise.

References

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