Concepedia

Wafer Thinning

Wafer Thinning is a micromachining process in MEMS fabrication whereby the bulk of a silicon wafer is selectively reduced in thickness to achieve mechanical, electrical, or packaging requirements, distinguishing it from other wafer-level processes by its focus on dimensional modification of the substrate for enhanced device performance or integration.

255

Publications

10.1K

Citations

1.2K

Authors

223

Institutions

Publications per year

2017–2026

33

Variants

Backgrinding

Parents

Publications

255

Bonding of silicon wafers for silicon-on-insulator

W. Maszara, Georges Goetz, A.L. Caviglia et al. · Journal of Applied Physics · 1988 · 861 citations

, , +17

n-Type Si solar cells with passivating electron contact: Identifying sources for efficiency limitations by wafer thickness and resistivity variation

Armin Richter, Jan Benick, Frank Feldmann et al. · Solar Energy Materials and Solar Cells · 2017 · 612 citations · Full text

, , +17

Three-Dimensional Integration Technology Based on Wafer Bonding With Vertical Buried Interconnections

Mitsumasa Koyanagi, T. Nakamura, Yusuke Yamada et al. · IEEE Transactions on Electron Devices · 2006 · 221 citations · Full text

, , +17

3D integration by Cu-Cu thermo-compression bonding of extremely thinned bulk-Si die containing 10 μm pitch through-Si vias

Bart Swinnen, Wouter Ruythooren, Piet De Moor et al. · 2006 · 191 citations

, , +17

Current Status of Research and Development for Three-Dimensional Chip Stack Technology

Kenji Takahashi, Hiroshi Terao, Yoshihiro TOMITA et al. · Japanese Journal of Applied Physics · 2001 · 175 citations

, , +12

1–5 of 255

Authors

1.2K

  1. EB
    Eric Beyne

    IMEC, Belgium

    18 publications · 746 citations

    14

    h-index

  2. AJ
    Anne Jourdain

    IMEC, Belgium

    16 publications · 525 citations

    12

    h-index

  3. BS
    Bart Swinnen

    IMEC, Belgium

    11 publications · 532 citations

    11

    h-index

  4. TN
    T. Nakamura

    Fujitsu (Japan), Japan

    8 publications · 550 citations

    8

    h-index

  5. MK
    Mitsumasa Koyanagi

    Tohoku University, Japan

    8 publications · 480 citations

    8

    h-index

1–5 of 1.2K

Institutions

223

  1. IMEC

    Leuven, Belgium

    16 h-index

    231 publications

    11.1K citations

  2. Fraunhofer Institute for Reliability and Microintegration

    Berlin, Germany

    10 h-index

    56 publications

    1.9K citations

  3. Industrial Technology Research Institute

    Hsinchu, Taiwan

    10 h-index

    75 publications

    2.6K citations

  4. Fujitsu (Japan)

    Kawasaki, Japan

    9 h-index

    49 publications

    1.6K citations

  5. Institute of Microelectronics

    Singapore, Singapore

    8 h-index

    41 publications

    985 citations

  6. Tohoku University

    Sendai, Japan

    8 h-index

    38 publications

    1.5K citations

  7. KU Leuven

    Leuven, Belgium

    8 h-index

    33 publications

    3.4K citations

  8. Disco (japan)

    Tokyo, Japan

    7 h-index

    20 publications

    855 citations

1–8 of 223

Venues

  1. IEEE Electron Device Letters

    7 publications · 280 citations

    7

    h-index

  2. Microelectronic Engineering

    7 publications · 392 citations

    7

    h-index

  3. 7

    h-index

  4. 6

    h-index

  5. Japanese Journal of Applied Physics

    JJAP · 5 publications · 331 citations

    5

    h-index

1–5