Mitsumasa Koyanagi - Concepedia

Author

Mitsumasa Koyanagi

Also Known As

M Koyanagi, M. Koyanagi, MITSUMASA KOYANAGI, Mallikarjun M. Kodabagi, Mitsumasa KOYANAGI, Mitsumasa Koyanagi, Mitsumasa Koyanagi Mitsumasa Koyanagi, 小柳光正

583

Publications

5.7K

Citations

H-Index

157

Concepts

All Affiliations

Tohoku University Palo Alto Research Center Hiroshima University Hatch (Canada)Tohoku Institute of Technology

About

Mitsumasa Koyanagi is an author at Tohoku University specializing in engineering, microelectronics, and applied physics.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	33	128	4.5K
2	Applied Physics	29	92	3.1K
3	Natural Sciences	10	10	255
4	Social Sciences	6	6	180
5	Education	1	1	11

Mitsumasa Koyanagi

140

Publications

4.7K

Citations

H-Index

Page 1

	Year	Citations
Future system-on-silicon LSI chips Mitsumasa Koyanagi, H. Kurino, Kang Wook Lee, IEEE Micro EngineeringVlsi DesignDevice IntegrationComputer ArchitectureInterconnect (Integrated Circuits)	1998	335
High-Density Through Silicon Vias for 3-D LSIs Mitsumasa Koyanagi, Takafumi Fukushima, Tetsu Tanaka Proceedings of the IEEE EngineeringSilicon On InsulatorHigh DensityWafer Scale ProcessingAdvanced Packaging (Semiconductors)	2009	295
Three-Dimensional Integration Technology Based on Wafer Bonding With Vertical Buried Interconnections Mitsumasa Koyanagi, T. Nakamura, Yusuke Yamada, IEEE Transactions on Electron Devices EngineeringComputer ArchitectureIntegration TechnologyVertical Buried InterconnectionsWafer Scale Processing	2006	220
Three-dimensional shared memory fabricated using wafer stacking technology K.W. Lee, T. Nakamura, Takahito Ono, EngineeringComputer ArchitectureIntegration Technology3D MemoryAdvanced Packaging (Semiconductors)	2002	140
Hot-electron-induced punchthrough (HEIP) effect in submicrometer PMOSFET's Mitsumasa Koyanagi, A.G. Lewis, Richard J. Martin, IEEE Transactions on Electron Devices Electrical EngineeringEngineeringHardware ReliabilityPhysicsElectron Spectroscopy	1987	134
Neuromorphic vision chip fabricated using three-dimensional integration technology Mitsumasa Koyanagi, Yasuo Nakagawa, Kangwook Lee, EngineeringNeuromorphic Vision ChipBiomedical EngineeringAdvanced Parallel ProcessingParallel Pattern Recognition	2002	113
New three-dimensional integration technology using self-assembly technique Takafumi Fukushima, Yusuke Yamada, H. Kikuchi, EngineeringComputer ArchitectureChip Alignment AccuracyAdvanced Packaging (Semiconductors)Three-dimensional Integration Technology	2006	102
Three-Dimensional Hybrid Integration Technology of CMOS, MEMS, and Photonics Circuits for Optoelectronic Heterogeneous Integrated Systems Kangwook Lee, Akihiro Noriki, K. Kiyoyama, IEEE Transactions on Electron Devices EngineeringDevice IntegrationIntegrated PhotonicsOptoelectronic DevicesIntegrated Circuits	2011	101
New Three-Dimensional Wafer Bonding Technology Using the Adhesive Injection Method Takuji Matsumoto, Masakazu Satoh Masakazu Satoh, Katsuyuki Sakuma, Japanese Journal of Applied Physics Materials Science3D Ic ArchitectureWafer Scale ProcessingEngineeringAdvanced Packaging (Semiconductors)	1998	90
Intelligent image sensor chip with three dimensional structure H. Kurino, K.W. Lee, T. Nakamura, EngineeringDevice IntegrationIntegration TechnologyImage SensorWafer Scale Processing	2003	87

Page 1